Gera

A component of the Leibniz Binary Subsystem, in 6 HP: eight AND gates between the Leibniz data and eight gate inputs, masking individual bits of the digital data. Each input has its lit button, taking the gate as it is or inverted, its red backlight showing the result. With Drezno, masking bits gives forms of quantization; on its own data, sequence automation, chaos and rhythms. Hardware logic, with virtually no latency.

Key features

• Eight GATE INPUTS, one per bit (7 down to 0)
• Eight lit buttons, each inverting its gate, the light on while the bit passes
• Leibniz in and out headers at the back; no jack of its own for the data