Snake Joke

A CMOS Euclidean trigger, gate and CV generator, its core designed by Tom Hirst, refined to three CMOS chips and used for years in his 4U system. Switches 1 to 4, or gates at their inputs overriding them, set how many triggers come in 16 steps, and the circuit does its best to space them evenly. Patching gates, a divided clock or anything, into those inputs changes the pattern on the fly; switched mid cycle it can go awry, and the momentary RESET switch, or its input, sets it straight. HIT GATE and HIT TRIG are the main outputs; C1 to C4 are gates from the circuit's internal switching, and CV a simple resistor DAC of them, about 0 to 5 V. Fixed to 16-step patterns, which the reset input and the switches can get around.

Key features

• CLOCK and RESET in; inputs 1 to 4 overriding their switches
• HIT GATE, HIT TRIG, C1 to C4 and CV out, each with its LED
• Switches 1 to 4 and a momentary RESET
• 8 HP; Nonlinearcircuits publishes no current draw, depth or assembled price (it sells the DIY PCB and panel), and ModularGrid lists none